Arbeitskreis Modellierung von Systemen und Parameterextraktion
Modeling of Systems and Parameter Extraction Working Group

6th International MOS-AK/GSA Workshop
(co-located with the CMC Meeting and IEDM Conference)
Washington DC Dec.11, 2013
MOS-AK: Over Two Decades of Enabling Compact Modeling R&D Exchange
MOS-AK Workshop Sponsors
Technical Program Promoters
MOS-AK Workshop Program
Important Dates:
  • Call for Papers - Sept. 2013
  • 2nd Announcement - Oct 2013
  • Final Workshop Program - Nov. 2013
  • MOS-AK/GSA Workshop - Dec. 11, 2013
Embassy of Switzerland
2900 Cathedral Ave, NW, 
Washington, DC 20008
  Workshop Agenda
Display Format: Citation Citation & Abstract
Morning Session:
O_1  Welcome and Workshop Opening
Tracy Dove, Scientific Advisor
Office of Science, Technology and Higher Education
Embassy of Switzerland
T_1  MOS-AK Introduction
W. Grabinski
T_2  Report on the IEEE Electron Devices Society Compact Modeling Committee
Colin McAndrew and Laurence Nagel
Freescale Semiconductor, Omega Enterprises Consulting (US)
T_3  The NEEDS Initiative
Mark Lundstrom
Purdue University (US)
T_4  An Overview of the Compact Model Coalition: Past Successes, Current Goals and Future Expections
Keith Green
Texas Instruments (US)
T_5  Developing a Common Platform and Standard for Compact Model Development
Mansun Chan
T_6  Terahertz SPICE for Nanometer Scale Field Effect Transistors
M. Shur, A. Gutin, and T. Ytterdal
Rensselaer Polytechnic Institute (US)
T_7  Compact quasi-static small-signal model for GaN HEMTs
B. Iñiguez1 , F.M. Yigletu1 , S. Khandelwal2 , T.A. Fjeldly2
1Department of Electrical Electronics and Automation Engineeting, URV, Tarragona, (SP); 2Dept. of Electronics and Telecommunication, NTNU, Trondheim (N)
Afternoon Session
Xyce Parallel Electronic Simulator a SPICE-compatible circuit simulator
Eric R. Keiter, Jason C. Verley
UTSOI2: A compact model for UTBB devices accounting for back interface inversion
Thierry Poiroux*, Olivier Rozeau*, Sebastien Martinie*, Patrick Scheer**, Marie-Anne Jaud*, Andre Juge** and Jean-Charles Barbe*
*CEA-LETI (F), **STMicroelectronics (F)
T_10  Poly-Si n+/TiN stack layers obtained by ECR plasmas as metal gate for sub-22 nm CMOS technology
Alisson Soares Garcia, Marcos V. P. dos Santos, Jose A. Diniz* and Jacobus W. Swart
CCS and FEEC/Unicamp (BR)
T_11  A characterization/reliability oriented simulation framework modeling charge transport and degradation in high-k stacks
L. Larcher
MDLab & University of Modena (I)
T_12  Characterization and modeling of RF-CMOSFETs in the millimeter-wave frequency domain
Sadayuki Yoshitomi, Fumie Fujii
TOSHIBA Corp, Semiconductor & Storage Products Company (J)
T_13  The Cost of Verification and SPICE Simulation – Everything Matters
Jushan Xie and John Pierce
T_14  Device modeling and validation methodologies
Mac McKeen
Microchip (US)
End of the workshop

Extended MOS-AK/GSA Committee:
  • Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group Manager
  • Harrison Beasley, Technical WG Manager, GSA
    MOS-AK/GSA North America
  • Chair: Pekka Ojala, Exar Corporation
  • Co-Chair: Geoffrey Coram, Analog Devices
  • Co-Chair: Prof. Jamal Deen, U.McMaster
  • Co-Chair: Roberto Tinti, Agilent EEsof Division
    MOS-AK/GSA South America
  • Chair: Prof. Gilson I Wirth; UFRGS; Brazil
  • Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
  • Co-Chair: Sergio Bampi, UFRGS, Brazil
  • Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
    MOS-AK/GSA Europe
  • Chair: Ehrenfried Seebacher, AMS, Austria
  • Co-Chair: Alexander Petr, XFab, Germany
  • Co-Chair: Prof. Benjamin Iniguez, URV, Spain
    MOS-AK/GSA Asia/South Pacific
  • Chair: Sadayuki Yoshitomi, Toshiba
  • Co-Chair: Xing Zhou, NTU Singapore   
  • Co-Chair: A.B. Bhattacharyya, JIIT New Delhi
update: Jan. 2014 (rev.a)
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