Palazzo del Casinò
Lungomare Marconi, 30
30126 Venice Lido, Italy

Abstract: 
Computer simulation of integrated circuits in the time domain is dominated by the time required to evaluate the transistor models such as BSIM4. A massively parallel graphics processing unit (GPU) can be used to speed up the evaluation of the transistors. This presentation gives an update of the performance of the ADS circuit simulator using several generations of Nvidia GPUs. Examining the results shows that further speedups are limited by the direct sparse matrix solver that runs on the CPU. Several GPU-based sparse matrix solvers are evaluated for suitability in solving circuit simulation problems. As integrated circuit power densities have increased, the heating of devices due to their power dissipation impacts their electrical behavior. Self heating models have been added to modern compact models, such as VBIC, Mextram, Hicum, and others. Self heating alone is insufficient for some circuits, such as RF power amplifiers where the bias devices must track the temperature of the driver stages. An overview of how a circuit simulator has been integrated with a thermal simulator for true electrothermal cosimulation will be presented, along with a couple of examples.

Abstract: 
The downscaling of CMOS processes has led to devices with a notable improvement in their RF performance. As a result, advanced nanoscale RF MOSFETs present very high Ft, which can be traded-off with lower power consumption, by shifting the operating point towards weak inversion region.For designing in the mm wave range, accurate modeling of the RF behavior of the transistor is a prerequisite. We explore whether the classical RF equivalent circuits and models are still accurate for nanoscale devices, focusing on low levels of inversion. We show that a a very simple RF equivalent schematic can lead to simple analytical expressions that are valid from weak to strong inversion, providing an accurate description of the RF behavior, including the Y-parameters, different RF Figures-of-Merit (FoMs), as well as the the four RF noise parameters. Additionally, we describe the procedure for the direct extraction from measurements of the components of the small-signal equivalent circuit. The analytical expressions are compared to RF measurements of a commercial state-of-the-art 40 nm CMOS process and to the advanced BSIM6 compact bulk MOSFET model, showing very good accuracy.

16:30-17:30

   As an IEEE Affinity Group we aim at promoting and recognizing the merits of women scientists. We also strive to encourage the careers of young female engineers, by providing them with role models from the scientific and research environment, and their exemplary achievements. At more practical level, we organize discussions and meetings, various competitions, etc.