Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
Joint AWG MOS-AK Workshop
Silicon Valley, December 7, 2022
Calendar
Open Directory
Books
Mission
Committee
MOS-AK: Enabling Compact Modeling R&D Exchange
  
Preannouncement and Call for Participation
Important Dates:
  • Announcement: Nov. 2022
  • Final Workshop Program: Dec.2 2022
  • Joint AWG MOS-AK Workshop: Dec.7, 2022
    in timeframe of IEDM and Q4 CMC Meetings
Venue:
Online
Online Registration to be open; any related enquiries can be sent to registration@mos-ak.org
Synopsis and Workshop Topics

  • HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization.
  • MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS/NEMS designs, CMOS/SOI and HEMT IC simulation.
  • The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe, GaN, InP) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC/Bio/Med) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models in the  for free open source PDKs.
Topics: to be covered include the following:
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source FOSS TCAD/EDA modeling and simulation
  • Technology R&D, DFY, DFT and IC Design Flows
  • Foundry/Fabless Interface Strategies for free open source PDKs
Speakerstentative list (alphabetic order)
  • Matthias Bucher, TU Crete (GR)
  • Tim Edwards, eFabless (USA)
  • Eric R Keiter, Xyce Sandia Lab (USA)
  • Mehdi Saligane, UMich (USA)
International MOS-AK Committee:
Committee
  • Local Organization Committee 
    • Rob Mains, CHIPS Alliance (USA) 
    • Mehdi Saligane, UMich (USA)
  • International MOS-AK Board of R&D Advisers
    • Larry Nagel, Omega Enterprises Consulting (USA)
    • Andrei Vladimirescu, UCB (USA); ISEP (FR)
  • MOS-AK Technical Committee
    Chair: Wladek Grabinski, MOS-AK (EU)
    MOS-AK/GSA North America
  • Chair: Pekka Ojala, Consultant (USA)
  • Co-Chair: Geoffrey Coram, Analog Devices (USA)
  • Co-Chair: Prof. Jamal Deen, U.McMaster (CA)
  • Co-Chair: Roberto Tinti, Keysight EEsof Division (USA)
    MOS-AK/GSA South America
  • Chair: Prof. Gilson I Wirth; UFRGS (BR)
  • Co-Chair: Prof. Carlos Galup-Montoro, UFSC (BR)
  • Co-Chair: Sergio Bampi, UFRGS (BR)
  • Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN (MX)
  • Co-Chair: Roberto S. Murphy, INAOE (MX)
  • MOS-AK/GSA Europe
  • Chair: Ehrenfried Seebacher, AMS (A)
  • Co-Chair: Prof. Benjamin Iniguez, URV (SP)
  • Co-Chair: Franz Sischka, SisConsult, (D)
    MOS-AK/GSA Asia/South Pacific

  • Chair: Sadayuki Yoshitomi, Toshiba (J)
  • Co-Chair: A.B. Bhattacharyya, JIIT New Delhi (IN)
  • Co-Chair: Min Zhang, XMOD Tech, Shanghai (CN)
  • Co-Chair: Kaikai Xu, 电子科技大学 (CN)    
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No.#50
update: Nov. 2022  (Rev. A)
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