Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
14th International MOS-AK Workshop
Silicon Valley, Dec. 17, 2021
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MOS-AK: Enabling Compact Modeling R&D Exchange
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Final MOS-AK Workshop Program
Important Dates:
  • Call for Papers: Oct. 2021
  • 2nd Announcement: Nov. 2021
  • Final Workshop Program: Dec.7 2021 
  • MOS-AK Workshop: Dec.17, 2021
    in timeframe of IEDM and Q4 CMC Meetings
    (Silicon Valley Time Zone / GMT-8)
    10:00am - 12:30pm MOS-AK Morning Session
    1:00pm - 3:30pm MOS-AK Afternoon Session
Online Event (GMT-8)
Display Format: Citation Citation & Abstract
I_0  MOS-AK Opening and Welcome
I_1  2021 accomplishments of the Si2 CMC
Peter Lee*, Jushan Xie**, and Takeshi Naito***
Si2 CMC (USA): * Micron Technology, ** Cadence Design Systems, Inc. *** Kioxia Corp.
10:00am - 1:00pm
MOS-AK Morning Session
Chair: Franz Sischka; Sisconsult (DE)
T_1  Efficient Finite Element Method Approach to Model Spin Orbit Torque MRAM
Nils Petter Jørstad, Simone Fiorentini, Wolfgang Goes*, Viktor Sverdlov
CDL NovoMemLog, Institut fur Mikroelektronik,
*Silvaco Europe Technische Universitat Wien (A)
T_2  Artificial Neural Network (ANN) for Device Modeling
Alexander Petr and Jianjun Xu
Keysight Technology Inc. (US)
T_3  Assessing virtual tunnel-FET technologies via look-up-table models
Sebastiano Strangio*, Francesco Settino**, Felice Crupi***, David Esseni****, Marco Lanuzza***, Pierpaolo Palestri****, Luca Selmi*****
*University of Pisa (I), **Infineon Technologies Villach (A), ***University of Calabria (I), ****University of Udine (I), *****University of Modena and Reggio-Emilia (Italy)
T_4  Introducing 3-nm Nano-Sheet technology in Microwind
Etienne SICARD
INSA Toulouse (F)
T_5  Perspectives on Automated Behavioral Model Generation
N_1  Automated Analog Layout using ALIGN
Sachin S. Sapatnekar
University of Minnesota (USA)
Virtual Break
1:00pm - 3:30pm
MOS-AK Afternoon Session
Chair: Gilson I Wirth, UFRGS (BR)
T_6  Online and Offline Simulation of Complex Integrated Circuits using Mixed Spice-HDL models
Mihaly Koltai
DesignSoft (H)
T_7  Recent advances in graphene transistors modeling towards analog/RF applications
Anibal Pacheco*, Nikolaos Mavredakis*, Fran Pasadas*,**, Pedro C. Feijoo*, Ferney Chaves*, Oihana Txoperena***, Juan Manuel Gomez***, Elias Torres***, David Jimenez*
*UA Barcelona (SP); **Uni Granada (SP); ***Graphenea S.A., San Sebastian (SP)
T_8  Current Developments for the Xyce Circuit Simulator
Jason Verley and Eric Keiter
Sandia National Laboratories (US)
T_9  Overview of Selected Open Source Tools for Compact Modeling
Markus Müller, Mario Krattenmacher and Pascal Kuthe
TU Dresden and SemiMod UG (h.b.)
T_10  Compact Modeling of through-silicon-vias with different ground configurations
Yojanes A. Rodríguez, Reydezel Torres, Roberto Murphy
INAOE, Puebla (MX)
End of MOS-AK Workshop
International MOS-AK Compact Modeling Committee

IEEE Membership
International R&D Advisory Board

Larry Nagel, Omega Enterprises Consulting (USA)
Fellow Member
Andrei Vladimirescu, UCB (USA); ISEP (FR)
Fellow Member
MOS-AK Compact Modeling TPC Chair

Wladek Grabinski, MOS-AK (EU)
Senior Member
North America TPC:  
Pekka Ojala, Exar (USA)
Geoffrey Coram, Analog Devices (USA) Senior Member
Jamal Deen, U.McMaster (CAN)
Fellow Member
Roberto Tinti, Keysight EEsof Division (USA)


South America TPC:

Gilson I Wirth, UFRGS (BR)
Senior Memner
Sergio Bampi, UFRGS (BR)
Antonio Cerdeira Altuzarra, Cinvestav-IPN (MX)
Senior Member
Roberto S. Murphy, INAOE (MX) Senior Member
Europe TPC:
Ehrenfried Seebacher, ams AG (A) .
Thomas Gneiting, AdMOS (D)
Benjamin Iniguez, URV (SP) Fellow Member
Daniel Tomaszewski, IMiF Warsaw (PL) Senior Member
Asia/Pacific TPC:
Sadayuki Yoshitomi, Kioxia (J) Member
Rakesh Vaid, University of Jammu (IN)Senior Member
Min Zhang, XMOD, Shanghai (CN)
Yuehang Xu, UESTC Chengdu (CN)

Kaikai Xu, UESTC Chengdu (CN)Senior Member
update: Jan.11 2022  (Rev.F)
Contents subject to change (C)1999-2022 All rights reserved. WG
Graphics (C) 2021 Oliver