Arbeitskreis MOS-Modelle und Parameterextraktion
MOS Modeling and Parameter Extraction Working Group
Compact Modeling for Nano CMOS/SOI Technologies

Friday, 14 September 2007 in Munich
Workshop Agenda: Friday, 14 September 2007 in Munich
Workshop Chair: W.Grabinski
Technical Program Coordinator: Prof. H. Iwai 
  • Morning Session
    • 9:00-11:00 Oral presentations
    • 10:00-10:30 (coffee break)
  • Afternoon Session
    • 13:00-16:00 Oral presentations
    • 14:30-15:00 (coffee break)
Sponsors of the MOS-AK Workshop
Agilent AMS
Synopsys XFab TUM
Technical Program Promoters
EuroTraining FSA 
ijnm_wiley SiliconSaxony
Compact Modeling for Nano CMOS/SOI Technologies - Workshop Program/Posters
Display Format: Citation Citation & Abstract
11:30 MOS-AK Poster Session - Chair: W.Grabinski
P_1  MOS RF Modelling and Parameter Extraction
J. Saijets and M. berg; VTT
P_2 star Compact Model for Long-Channel Symmetric Doped DG MOSFETs
A. Cerdeira1, O. Moldovan2, B. Iiguez2 and M. Estrada1; 1CINVESTAV; 2Universitat Rovira i Virgili
P_3  EKV3 Model Parameter Extraction Package for IC-CAP
T. Gneiting1, W. Grabinski2; 1AdMOS, 2GMC
P_4 star Interactive Compact Device Modeling Using Qucs Equation Defined Devices
S. Jahn, M. Brinson and M. Margraf; Qucs Sourceforge Project
P_5  Optimization of the Substrate Parameters for EM-Simulators
F. Korndrfer1, F. Sischka2; 1IHP, 2Agilent Technologies
P_6  Extending Power Device Testing to the Wafer Level: New Test Capability for Power Devices
A. Lord and R. Zowada, Cascade Microtech Europe
P_7 star A comparator design as an example
J. P. Oliveira1, J. Goes1, N. Paulino1, J. Fernandes2, J. Paisana3; 1UNINOVA, 2INESC-ID, 3IT-IST
P_8 star A Compact Model for Carbon Nanotube Network TFTs
R. Picos, A. Schindler1, B. Iiguez2, M. Roca, and E. Garcia-Moreno; Universitat de les Illes Balears; 1Uni Stuttgart, 2Universitat Rovira i Virgili
P_9 star A SPICE Model for Silicon Photodiode
B. Senapati1, S. Klinger2, V. Vescoli1, E. Seebacher1 and M. Berroth2; 1Austriamicrosystems AG; 2Uni Stuttgart
P_10  ADMS/Verilog-A Standardization
S. Sukharev and L. Lemaitre; Freescale
P_11  T-Spice Pro, The Windows solution for mixed-signal IC design
P. Kaiser; EDA Solutions
12:00 End of the MOS-AK Poster Session
 star recommended papers for further IJNM publication
update: 22-Sept-07 (rev.a)
Contents subject to change 1999-2007 All rights reserved. WG
Graphics 2007 Oliver