Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
  MOS-AK ESSDERC/ESSCIRC Workshop
September 11, 2017  Leuven
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Mission
Committee
MOS-AK: Enabling Compact Modeling R&D Exchange
MOS-AK Sponsor and Technical Program Promoters
ASCENT
Lead Sponsor
NEEDS
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IJHSES
Publishing Partner
MOS-AK Workshop Program
Important Dates:
  • Preannouncement - March 2017 
  • Call for Papers - June 2017
  • Final Workshop Program - August 2017
  • MOS-AK Workshop - Sept.11, 2017
Venue: KU LEUVEN Campus of Social Sciences (Parkstraat 45, 3000 Leuven) room AV 91.12
Agenda 
Display Format: Citation Citation & Abstract
08:00-08:30
Registrations (how to register)
08:30-10:00
MORNING SESSIONS Chair: Jean-Michel Sallese, EPFL (CH)
T_1  MOS-AK Introduction
W. Grabinski
MOS-AK (EU)
T_2  ASCENT: Access to Leading European Nanoelectronics Technology
Jim Greer
Tyndall (IRL)
T_3  Junctionless Nanowire Transistors Performance: Static and Dynamic Modeling
Marcelo Antonio Pavanello
Centro Universitario FEI (BR)
10:00-10:30
COFFEE BREAK
10:30-12:30
MORNING SESSIONS (continued)
T_4  Modeling and Analysis of Full-Chip Parasitic Substrate Currents
Renaud Gillon and Wim Schoenmaker
ONSEMI (B), MAGWEL (B)
T_5  Small- and large-signal RF modeling of silicon-based substrates
Martin Rack and Jean-Pierre Raskin
Université catholique de Louvain (B)
T_6  Tunnel FET C-V modeling: Impact of TFET C-V characteristics on inverter circuit performance
Chika Tanaka, Tetsufumi Tanamoto, and Masato Koyama
Toshiba (J)
12:30-14:00
LUNCH
14:00-15:00
AFTERNOON SESSIONS Chair: Daniel Tomaszewski ITE (PL)
T_7  ASCENT Open Access to 14nm PDKs
T. Chiarella, N. Cordero, O. Faynot
Tyndall (IRL)
T_8  Modelling of Surface Traps Effect on Semiconductor Nanowires
Ashkhen Yesayan*, Stepan Petrosyan*, Jean-Michel Sallese**
*Institute of Radiophysics and Electronics NAS RA, 0203, Armenia, **EPFL (CH)
15:00-15:30
COFFEE BREAK
15:30-17:00
AFTERNOON SESSIONS (continued)
T_9  Measurement and modelling of specific behaviors in 28nm FD SOI UTBB MOSFETs of importance for analog / RF amplifiers
D. Flandre, V. Kilchytska, B. Kazemi, C. Gimeno and J.-P. Raskin
UC Louvain
T_10  IEEE EDS Compact Model Standardization
Benjamin Iniguez
URV (SP)
T_11  Is it possible to reduce the PDK development cost when demand for data is continuously increasing?
Andrej Rumiantsev
MPI Corporation

LATE NEWS / POSTER BRIEFING
T_12  Optimal measurement parameters for accurate time-domain and spectral analyses of RTN
Léopold Van Brandt*, Valeriya Kilchytska*, Jean-Pierre Raskin*, Bertrand Parvais** and Denis Flandre*
*ELEN department, ICTEAM Institute, Université catholique de Louvain, Louvain-la-Neuve, Belgium, **imec, Kapeldreef 75, B-3001 Leuven, Belgium
T_13
Compact modeling for CMOS technology development and IC design
Daniel Tomaszewski
ITE Warszaw (PL)
17:00 END of MOS-AK WORKSHOP
  Extended MOS-AK Committee:

Committees:
  • International MOS-AK Board of R&D Advisers
    • Larry Nagel, Omega Enterprises Consulting (US)
    • Andrei Vladimirescu, UCB (US); ISEP (FR)
  • MOS-AK Workshop Program Coordination
    • Jean-Michel Sallese, EPFL (CH)
    • Daniel Tomaszewski, ITE (PL)
    • Wladek Grabinski, MOS-AK (EU)
  • MOS-AK Technical Committee
    MOS-AK North America
  • Chair: Pekka Ojala, Exar Corporation (US)
  • Co-Chair: Geoffrey Coram, Analog Devices (US)
  • Co-Chair: Jamal Deen, U.McMaster (CA)
  • Co-Chair: Roberto Tinti, Keysight EEsof Division (US)
    MOS-AK South America
  • Chair: Gilson I Wirth; UFRGS; (BR)
  • Co-Chair: Carlos Galup-Montoro, UFSC; (BR)
  • Co-Chair: Sergio Bampi, UFRGS, (BR)
  • Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, (MX)
    MOS-AK Europe
  • Chair: Ehrenfried Seebacher, ams AG, (A)
  • Co-Chair: Suba Subramaniam, XFab, (D)
  • Co-Chair: Benjamin Iniguez, URV, (SP)
  • Co-Chair: Franz Sischka, SisConsult, (D)
    MOS-AK Asia/South Pacific

  • Chair: Sadayuki Yoshitomi, Toshiba (J)
  • Co-Chair: Min Zhang, XMOD Shanghai, (CN)
  • Co-Chair: Xing Zhou, NTU Singapore (SG)  
  • Co-Chair: A.B. Bhattacharyya, JIIT New Delhi (IN)
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update: Sept. 2017 (rev. a)
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