| Arbeitskreis
MOS-Modelle und Parameterextraktion MOS Modeling and Parameter Extraction Working Group MOS-AK Meeting |
| 2-3 April 2009 at IHP in Frankfurt /Oder |
| 2 April 2009 | |
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| 3 April 2009 | |
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| Sponsor and Technical Program Promoters |
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| MOS-AK Meeting Program |
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| 2 April'09 | ||||||
| Welcome: Bernd Tillack, IHP and Wladek Grabinski, GMC Suisse | ||||||
| 13:00 | IHP tutorials and fab visit (afternoon: 13:00-15:30) | |||||
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| 15:30 | COMON Project Meeting (afternoon: 15:30-18:00) | |||||
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| 19:00 | MOS-AK Networking
Reception (evening: after 19:00) Café am Kleistpark:
Kleiststraße 7; 15230 Frankfurt (Oder)
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| 3 April'09 | ||||||
| 9:00 | Workshop Opening: Wladek Grabinski, GMC Suisse | |||||
| 9:00-11:45 | Morning Session - Chair: Prof. Benjamin Iniguez | |||||
| P_1 |
A Short Introduction of IHP W. Kissinger and B. Tillack IHP |
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| P_2 |
Towards Predictable Compact Model
Descriptions for Organic Thin-Film Transistors S. Mijalkovic*, D. Green*, A. Nejim*, A. Rankov**, E. Smith**, T. Kugler**, C. Newsome**, J. Halls** *Silvaco Technology Centre, Silvaco Europe Limited St Ives, Cambridgeshire, UK; **Cambridge Display Technology Limited, Cardinal Park Godmanchester, PE29 2XG, UK |
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| P_3 |
Low Frequency Noise Modeling at Low
Temperature with the EKV3 Compact Model Patrick Martin*, Gérard Ghibaudo** and Matthias Bucher*** CEA, LETI, Minatec (France), **IMEP, Minatec (France), ***Technical University of Crete (Greece) |
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| P_4 |
Large Signal Modeling of
Inversion-Mode MOS Varactors in VCOs Jan-K. Bremer, Tim Peikert and Wolfgang Mathis Institute of Electromagnetic Theory, Leibniz University of Hannover |
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| P_5 |
Global extraction of parameters
using the EKV model: some properties of the underlying optimization task Jaroslaw Arabas, Lukasz Bartnik, Slawomir Szostak and Daniel Tomaszewski* Warsaw University of Technology, *ITE Warsaw |
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| 11:30-12:00 | Posters' Briefing - Chair: Wladek Grabinski; GMC Suisse | |||||
| 12:00-13:00 | Lunch | |||||
| 13:00-16:00 | Afternoon Session - Chair: Dr. Rene Scholz, IHP | |||||
| P_6 |
Need for a standard subset of
Verilog-A, with coding practices, for compact modeling Gilles Depeyrot and Frédéric Poullet DOLPHIN Integration, France |
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| P_7 |
Advances in compact semiconductor
device modelling and circuit macromodelling with the Qucs GPL circuit
simulator M.E. Brinson, S. Jahn* and M. Cullinan London Metropolitan University, *Qucs development team |
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| P_8 |
Increasing Accuracy and
Productivity of Device
Characterization Processes for Efficient Modeling of Next-Generation
Semiconductors Andrej Rumiantsev, Stojan Kanev SUSS MicroTec Test Systems GmbH |
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| P_9 |
Quality of HiSIM_HV Model for Analog
Circuit Design B. Senapati, K. Molnár, A. Steinmair and E. Seebacher austriamicrosystems AG |
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| P_10 |
Quantum compact model for
ultra-short and ultra-narrow body FinFET Mingchun Tang, Fabien Prégaldiny and Christophe Lallement InESS / UdS |
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| 16:00 | End of the MOS-AK Meeting | |||||
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