1st Asia/South Pacific MOS-AK Workshop

Arbeitskreis Modellierung von Systemen und Parameterextraktion
Modeling of Systems and Parameter Extraction Working Group
1^st Asia/South Pacific MOS-AK Workshop
(virtual/online) FEB. 25-26, 2021

Calendar

Open Directory

Books

Mission

Committee

MOS-AK: Enabling Compact Modeling R&D Exchange

MOS-AK Techical Program Promoters

Providing Online Meeing Platform

Publication Partner

Final Workshop Progam

Important Dates:

Call for Papers - Dec. 2020
2nd Announcement - Jan. 2021
Final Workshop Program - Feb. 2021
MOS-AK Workshop - FEB. 25-26, 2021

Day 1 begins: 8:00 in Europe; 12:30 in India; 15:00 in China
Day 2 begins: 8:00 in Europe; 12:30 in India; 15:00 in China

Agenda

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Citation

Citation & Abstract

FEB.25

MOS-AK Workshop Day 1 Begins: 8:00 in Europe = 12:30 in India = 15:00 in China

[0]

MOS-AK Workshop Opening
Nilesh Pandey, Sheikh Aamir Ahsan, W.Grabinski
MOS-AK (EU)

Session A

Chair Usha Gogineni, ams AG, Hyderabad (IN)

[1]

New Insights in Low Frequency Noise Characteristics in PE-BJTs
Peijian Zhang and Ma Long
Science and Technology on Analog Integrated Circuit Laboratory; WHU (CN), Keysight Technologies (US)

[2]

Direct white noise characterization of short-channel MOSFETs
K. Ohmori and S. Amakawa
DeviceLab, Tsukuba (J)

[3]

SPICE Modeling of 2D-material based FETs with Schottky-barrier contacts
Sheikh Aamir Ahsan
Nanoelectronics Research and Development Group, NIT Srinagar, Jammu and Kashmir (IN)

[4]

Physics-based model of SiC MOSFETs including high voltage and current regions
Sourabh Khandelwal, Cristino Salcines, and Ingmar Kallfass
Macquarie University Sydney (AU), University of Stuttgart (D)

Session B

Chair: Daniel Tomaszewski, IMiF, Warszaw (PL)

[5]

Compact Modeling for Gate-All-Around FET Technology
Avirup Dasgupta
IIT Roorkee (IN)

[6]

BSIM-HV: Advanced High Voltage MOSFET Compact Model
Harshit Agarwal
IIT Jodhpur (IN)

[7]

ASCENT+ Transnational Access for the nanoelectronics
Georgios Fagas
Tyndall (IE)

FEB.26

MOS-AK Workshop Day 2 Begins: 8:00 in Europe = 12:30 in India = 15:00 in China

Session C

Chair: Sadayuki Yoshitomi, Kioxia (J)

[8]

eSim: An open source CAD software for circuit simulation
Kannan Moudgalya
IIT Bombay (IN)

[9]

A modular approach to next generation Qucs
Felix Salfelder and Mike Brinson
QUCS Team; Centre for Communications Technology, London Metropolitan University (UK)

Abstract:
Qucs implements a graphical user interface based on the Qt3 toolkit. This interface makes heavy use of the library functions provided by Qt3. The successor, Qt4, has a compatibility layer that was sufficient to run Qt3 Qucs with only slight modifications. With the release of Qt5 in 2012,Qt3 backwards compatibility was abandoned in favour of a more efficient, object-oriented, graphics framework. While attempting to switch Qucs to Qt5 it became evident that the code base needed extensive qualitative improvements. For once, the monolithic structure of the project made it very hard to extend and maintain. As the port to Qt5 requires a rework of all non-trivial program structures and algorithms the decision was made to do both modularisation and code modernisation in one step. This process also embodies the design of a stable API for future Qucs extensions. As of today, current work provides a schematic editor with compiled extensions that are loaded optionally. Such extensions add circuit components, visualisation tools, data I/O, and simulator drivers and netlist code generators. The current focus of the initiative is to provide a set of features implemented by the latest Qucs release as user loadable plug-ins, plus a series of new features ported from Qucs forks, predominantly Qucs-S and CanEDA. This presentation concentrates on the current state of the next generation Qucs initiative with simulation and compact modelling examples based on extended Qucs-S/Xyce component and device models plus CMC Verilog-A Modules.

[12]

Machine learning-based approach to model and analyze GaN power devices
Tian-Li Wu
National Yang Ming Chiao Tung University, Taiwan (TW)

[11]

TCAD-inspired compact modeling approach
Sung-Min Hong and Kwang-Woon Lee
Gwangju GIST (KR)

Session D

Chair: Sheikh Aamir Ahsan, NIT Srinagar (IN)

[10]

An Innovative Technique for Ultrafast Carrier Dynamics and THz Conductivities of Semiconductor Nanomaterials
Praveen Kr. Saxena and Fanish Kr. Gupta
Tech Next Lab, Lucknow (IN)

[13]

Compact Modeling of 3D NAND Flash Memory for Diverse Unconventional Analog Applications
Shubham Sahay
IIT Kanpur (IN)

[14]

Steep Subthreshold Slope PN-Body Tied SOI-FET for Ultralow Power LSI, Sensor, and Neuromorphic Chip
Takayuki Mori and Jiro Ida
Kanazawa Institute of Technology, Nonoichi (J)

End

of MOS-AK A/SP Workshop

International MOS-AK Committee:

Committee

International MOS-AK Board of R&D Advisers

Larry Nagel, Omega Enterprises Consulting (USA)
Andrei Vladimirescu, UCB (USA); ISEP (FR)

MOS-AK Technical Committee
MOS-AK North America
Chair: Pekka Ojala, Exar Corporation (USA)
Co-Chair: Geoffrey Coram, Analog Devices (USA)
Co-Chair: Roberto Tinti, Keysight EEsof Division (USA)
MOS-AK South America
Chair: Gilson I Wirth; UFRGS (BR)
Co-Chair: Sergio Bampi, UFRGS (BR)
Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN (MX)
Co-Chair: Roberto S. Murphy, INAOE (MX)
MOS-AK Europe
Chair: Ehrenfried Seebacher, AMS (A)
Co-Chair: Sanjay Mane, XFab, (D)
Co-Chair: Thomas Gneiting, AdMOS, (D)
Co-Chair: Benjamin Iniguez, URV (SP)

MOS-AK Asia/South Pacific

Chair: Sadayuki Yoshitomi, Kioxia (J)
Co-Chair: Min Zhang, XMOD Tech, Shanghai (CN)
Co-Chair: Kaikai Xu, UESTC, Chengdu (CN)

No.#6690

update: Apr. 2021 (Rev.F)