Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
2nd Sino MOS-AK Workshop
Hangzhou June 2016
MOS-AK: Enabling Compact Modeling R&D Exchange
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Preannouncement and Call for Papers
Important Dates:
  • Call for Papers - March. 2017
  • 2nd Announcement - April 2017
  • Final Workshop Program - May 2017
  • 2nd Sino MOS-AK Workshop -June 2017
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Synopsis and Workshop Topics
Synopsis:
  • HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models.
  • MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
  • The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind the IC simulation in modern device models.
Topics: to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • open source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and IC Designs
  • Foundry/Fabless Interface Strategies
Abstracts  onlinde submission to be opne

Extended MOS-AK Committee:
Committee
  • MOS-AK Shanghai Organzation Committee
    • Min Zhang, XMOD (Shanghai)
    • Wladek Grabinski, MOS-AK (EU)
  • International MOS-AK Board of R&D Advisers
    • Larry Nagel, Omega Enterprises Consulting (USA)
    • Andrei Vladimirescu, UCB (USA); ISEP (FR)
  • Technical Committee
    MOS-AK/GSA North America
  • Chair: Pekka Ojala, Exar Corporation
  • Co-Chair: Geoffrey Coram, Analog Devices
  • Co-Chair: Prof. Jamal Deen, U.McMaster
  • Co-Chair: Roberto Tinti, Keysight EEsof Division
    MOS-AK/GSA South America
  • Chair: Prof. Gilson I Wirth; UFRGS; Brazil
  • Co-Chair: Prof. Carlos Galup-Montoro, UFSC; Brazil
  • Co-Chair: Sergio Bampi, UFRGS, Brazil
  • Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
    MOS-AK/GSA Europe
  • Chair: Ehrenfried Seebacher, AMS, Austria
  • Co-Chair: Alexander Petr, XFab, Germany
  • Co-Chair: Prof. Benjamin Iniguez, URV, Spain
  • Co-Chair: Franz Sischka, SisConsult, Germany
    MOS-AK/GSA Asia/South Pacific

  • Chair: Sadayuki Yoshitomi, Toshiba
  • Co-Chair: Min Zhang, XMOD Technologies, Shanghai 
  • Co-Chair: Xing Zhou, NTU Singapore   
  • Co-Chair: A.B. Bhattacharyya, JIIT New Delhi
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update: Dec.2016 (rev. a)
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